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Memory Testing Handler

Memory Testing Handler

The package test measures the electrical characteristics, functional characteristics, and operating speed of the product by putting the semiconductor into the tester and applying various conditions of voltage, electrical signals, and temperature.

  • Docking Type (Vertical Docking Test Handler)
  • Parallel(Single Test head) 256~512
  • UPH 22,000 ~ 40,960 (1Bin)
  • Jam Rate 1/25,000
  • Temp Control Range -40℃ ~ +120℃
  • Min. device ball pitch >0.35mm
  • Ball edge to package edge clearance >0.3mm
  • Min & Max Package size >6×6 ~ 12x12mm (Square), Up to 12x20mm (Rectangular)
  • Min/Max Package Thickness (include balls) 10.8-1.8mm
  • Target Package TSOP, TQFP, BGA, MCP, POP CSP(μBGA, fBGA, QFN)