It is the latest wafer-level burn in test system designed for power devices This innovative tester accommodates 2 wafer test parallelism 480 die test parallelism per wafer. Independent driver channels for Simultaneous voltage/current measurement as well as temperature monitoring. Designed with a seal chamber to accommodate inert gas such as nitrogen and arc suppression gasses. It protects the DUTs from arc & Oxidation while keeping the tester in an operational
temperature state without overheating.